Master mode operation...
For a master using 7-bit addressing, accessing a DDC device, the following would be done specifically:
Not explicitly described in the manual's configuration guidance, the following buffer control registers may be set:
Not explicitly described in the manual's configuration guidance, the following interrupt configuration registers may be set:
The following registers can apparently be configured to control DMA behaviour:
Presumably, reading from SMBDC is sufficient to update the reception buffer.
To read EDID data from a DDC device, it would presumably be possible in the simplest case to just write 0x100 to SMBDC repeatedly to reserve a number of buffer entries and to test for incoming data using either the SMBRXFLR register (indicating the number of valid data entries) or employing SMBST.RFNE (buffer not empty).
To batch reads, the buffer full threshold could be set to a reasonable amount, and upon detecting the SMBINTST.RXFL (buffer full) condition, multiple reads could then be performed.
The DMA mechanism would be set up as follows:
Presumably, writing to SMBDC is sufficient to update the transmission buffer.
|SMBENB||0||1 to enable SMB, 0 to disable|
Disabling during transfers completes the transfer (presumably the current contents of the transfer buffer) and issues a stop condition. Disabling during reception obtains the current byte but sends no acknowledgement condition.
|STPHLD||7||1 to prevent STP being automatically sent|
|SLVDIS||6||1 to prevent slave mode after reset|
|REST||5||1 to permit restart conditions|
|MATP||4||Corresponds to SMBTAR.MATP|
|SATP||3||1 to respond to 10-bit, not 7-bit addresses|
|SPD||2..1||0b10 for 400kbps, 0b01 for 100kbps|
|MD||0||1 to enable master|
It might be useful to always assert SLVDIS to avoid state issues in the peripheral. It might also be useful to assert REST for robustness. For master mode, MD needs to be set.
|MATP||12||1 for 10-bit, 0 for 7-bit, addressing|
|SPECIAL||11||1 for special call, 0 for normal addressing|
|GC_OR_START||10||1 for start byte, 0 for general call|
Data transmission and reception.
|CMD||8||1 to read, 0 to write|
|DAT||7..0||Data for transmission|